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Recent Solid State Electronics Letters Articles

Recently published articles from Solid State Electronics Letters.

Architecture of resistive RAM with write driver

Shashank Kumar Dubey | A. Reddy | Rashi Patel | Master Abz | Avireni Srinivasulu | Aminul Islam

As technological advancements are increasing in the world at a faster rate, the need of miniaturization is also growing parallelly. The scaling of existing MOS technology in nanometre regime has caused...

A 5-bit 500MS/s flash ADC with temperature-compensated inverter-based comparators

Jiangpeng Wang | Wing-Shan Tam | Chi-Wah Kok | Kong-Pang Pun

In this paper, a 5-bit 500MS/s flash analog-to-digital converter (ADC) with temperature-compensated inverter-based comparators is proposed. In the proposed ADC, a complementary-average system structure...

Structural optimization and miniaturization for Split-Gate Trench MOSFETs with 60 V breakdown voltage

Yu-Chin Lee | Jyh-Ling Lin

Power loss has long been a problem that humans continue to explore, especially in this high-performance era, in which the question of how to reduce the power loss of electronic products is an important...

Simulation on the electric field effect of Bi thin film

Lee-Chi Hong | Chieh Chou | Hao-Hsiung Lin

We report our simulation on the electric field effect of Bi thin film. Band diagram and carrier concentrations of the Bi channel at different surface potentials have been obtained by numerically solving...

Designing the Topology of a Unipolar Pulsed-DC Power Supply using the Open-source Scilab/Xcos Software for a Low-cost Plasma Etcher

Samuel Husin Surya Mandala | Mochamad Januar | Bei Liu | Kou-Chen Liu

We proposed a design topology for a unipolar pulsed direct-current power supply to produce low-cost reactive plasma etcher system. The design was simulated by a block diagram method using the open-source...

Investigation on 10-nm channel-length n-type junctionless variable barrier nanowire transistor

Keng-Ming Liu | Sheng-Hong Liao

In this paper we simulated and investigated the device characteristics of a novel device structure derived from the junctionless (JL) gate-all-around (GAA) nanowire (NW) transistor, variable barrier...

Simulation and analysis of the forward bias current–voltage–temperature characteristics of W/4H-SiC Schottky barrier diodes for temperature-sensing applications

Kamal Zeghdar | Hichem Bencherif | Lakhdar Dehimi | Fortunato Pezzimenti | Francesco G. DellaCorte

The current-voltage (ID-VD) characteristics of W/4H-SiC Schottky barrier diodes (SBDs) are investigated in the 303–448 K temperature range by means of a numerical simulation study. Results showed a...

Optical field concentrator with low absorption metasurfaces based on planar silicon nanoantennas on silica

M. Obradov | Z. Jakšić | D. Tanasković | O. Jakšić | D. Vasiljević Radović

Plasmonic metamaterials open a pathway to a multitude of different applications, from ultrasensitive sensors to merging the packaging density of electronics and the speed of photonics in a single all-optical...

Z-Copy Current Differencing Buffered Amplifier based Schmitt trigger circuit without passive components

July 2019
Kankanampati Maheswari | Avireni Srinivasulu | Cristian Ravariu

In this paper Z-Copy Current Differencing Buffered Amplifier (ZCCDBA) based new Schmitt trigger is introduced without passive components. This ZCCDBA is a newly introduced active element. It consists...

Voltage differencing transconductance amplifier based fractional order multiple input single output universal filter

July 2019
Parveen Rani | Rajeshwari Pandey

In this paper a Voltage Differencing Transconductance Amplifier (VDTA) based Voltage Mode (VM) Multi Input Single Output (MISO) Fractional Order filter (FOF) providing all five filter responses is presented....

Modeling the negative capacitance effect in dispersive organic materials using modified Drude theory

July 2019
You-Lin Wu | Jing-Jenn Lin | H.L. Kwok

Frequency- and mobility-dependent admittance have been observed in organic polymer light-emitting diodes. In this paper, we developed a model to describe this dispersive behavior using a modified Drude...

Development of SiC reliability study tool

July 2019
T. Phulpin | A. Jaffre | J. Alvares | M. Lazar

Understanding the failure mechanisms is essential to ensure reliability for a new technology of semiconductors. Amongst various existing tools dedicated to silicon-based devices, there is no consensual...

An improved digital output buffer for a digital temperature sensor with an I2C high speed interface

July 2019
Anca Mihaela Dragan | Andrei Enache | Alina Negut | Adrian Macarie Tache | Gheorghe Brezeanu

An improved digital open drain output buffer is designed in a 0.18µm CMOS process. The circuit can operate in a wide range of power supply voltages, from 1.5V to 5.6V. This output buffer is used in...

Design and optimization of 30 V fully isolated nLDMOS with low specific on-resistance for HVIC applications

July 2019
Vivek Ningaraju | Horng-Chih Lin | Po-An Chen | Kuang-Lun Lin

In this paper, a novel 30 V fully isolated n-channel lateral DMOS (nLDMOS) with low specific on-resistance (RON,sp) is proposed and experimentally realized using 0.35 µm Bipolar-CMOS-DMOS (BCD) process....

Planar-Nothing On Insulator parasitic structure within a static induction transistor made by selective epitaxial growth

July 2019
Cristian Ravariu | Avireni Srinivasulu | Lidia Dobrescu

Power dissipation obstacle in electronic devices is strongly related to their internal breakdown mechanism. The Static Induction Transistor optimization imposes to reach p-gate regions as deep as vertical...

Performance analysis of GaN-based micro light-emitting diodes by laser lift-off process

July 2019
Sheng-Hui Li | Chia-Ping Lin | Yen-Hsiang Fang | Wei-Hung Kuo | Ming-Hsien Wu | Chu-Li Chao | Ray-Hua Horng | Guo-Dung J. Su

In this study, a monochromatic GaN-based micro-light-emitting-diode (µLED) array was fabricated using flip-chip technology. The laser lift-off (LLO) process was employed to decrease the light divergence...

Effect of aluminum interfacial layer in a niobium oxide based resistive RAM

July 2019
Vishal Jain Manjunath | Andrew Rush | Abhijeet Barua | Rashmi Jha

Resistive RAM (Random Access Memory) has good scalability with high switching speed and low operating voltage making it one of the promising emerging nonvolatile memory technologies. Interfacial layer...

Performance enhancement of triple material double gate TFET with heterojunction and heterodielectric

July 2019
P. Vimala | T.S. Arun Samuel | D. Nirmal | Ajit Kumar Panda

In this paper, we proposed a 2 dimensional model of tripple material double gate Tunnel Field Effect Transistor (TM-DG TFET) with hetero-junction formed by germanium and silicon materials in the source-channel...

Analysis and modeling of sequential circuits in QCA nano computing: RAM and SISO register study

July 2019
Md. Abdullah-Al-Shafi | Rahman Ziaur

Quantum-dot cellular automata (QCA) is a foremost archetype of field-coupled nanoscale devices. It is a non-von-Neumann, minimal energy dissipated model for conventional nano computing by transistor...

A critical look at modular adders using residue number system

July 2019
K. Vijaya Vardhan | K.M. Santhoshini | Sarada Musala | Avireni Srinivasulu

Presently, computer scientists and researchers show greater interest in one of the ancient techniques, namely, Residue Number System (RNS) to use in different fields. In this paper, an introduction...

Mobility model based on piezoresistance coefficients for Ge 3D transistor

July 2019
Kuan-Ting Chen | Ren-Yu He | Yun-Fang Chung | Min-Hsin Hsieh | Shu-Tong Chang

•To develop piezoresistance model for Ge 3D transistor.•Stress response for hole mobility of Ge 3D transistor is predicted.•Helps the future 3D Ge-based CMOS device design with strain engineering....

GaAs1-xSbx/GaAs single quantum well for long wavelength photonic devices

July 2019
Hsiao-Tzu Huang | Wei Cao | Hao-Hsiung Lin | Yu-Chung Chin

Carrier dynamics in GaAs1-xSbx/GaAs single quantum well (SQW) is investigated in this report. With Sb incorporation (x = 0.352, 0.405), the photoluminescence (PL) emission peaks exhibit characteristics...

Design methodology of double nulling resistors nested-Miller compensation of multistage amplifier

January 2019
Wing-Shan Tam | Chi-Wah Kok

This paper presents a methodology to design large capacitive drive amplifier with high gain feed-forward transconductance stage using double nulling resistors nested-Miller compensation. The high gain-bandwidth...

An integrator circuit using voltage difference transconductance amplifier

January 2019
K. Malathi Santhoshini | Sarada Musala | Srinivasulu Avireni

This paper illustrates a novel design of voltage-mode Integrator using the active element, namely Voltage Difference Transconductance Amplifier (VDTA). The proposed circuit avails one VDTA element and...

Influence of electron quantum confinement on the strength of carbon nanotube bundles

January 2019
Lucian D. Filip | Valeriu Filip

Radial confinement and specific boundary conditions lead to inhomogeneous spatial distributions for conduction electrons in metallic carbon nanotubes.Such uneven spread of negative charge on the surface...

A constant Q-factor notch filter using voltage difference transconductance amplifier

January 2019
K. Roja | K.M. Santhoshini | M. Sarada | Avireni Srinivasulu

This paper demonstrates a novel design of Notch filter circuit availing Voltage Difference Transconductance Amplifier (VDTA) active element. The proposed circuit utilizes two VDTA blocks, two capacitors...

Latch-up issue of drain metal connection split in test circuit with 3D TCAD simulation analysis in CMOS application

January 2019
Chun Chiang | Ping-Chen Chang | Tien-Hao Tang | Kuan-Cheng Su

In CMOS integrated circuit (IC), parasitic Silicon-Controlled Rectifier (SCR) path is unavoidable and causes the risk of latch up (LU) issue. In this work, we found that the SCR characteristic would...

Current collapse scaling in GaN/AlGaN/SiC high electron mobility transistors

January 2019
D.S. Rawal | Amit | Sunil Sharma | Sonalee Kapoor | Robert Laishram | Seema Vinayak

This study reports the scaling of current collapse in GaN/AlGaN HEMTs with respect to the un-passivated gate drain distance on the gate edge. The source drain current reduction increased from 4 mA to...

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