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Recent Solid State Electronics Letters Articles

Recently published articles from Solid State Electronics Letters.

GaAs1-xSbx/GaAs single quantum well for long wavelength photonic devices

July 2019
Hsiao-Tzu Huang | Wei Cao | Hao-Hsiung Lin | Yu-Chung Chin

Carrier dynamics in GaAs1-xSbx/GaAs single quantum well (SQW) is investigated in this report. With Sb incorporation (x = 0.352, 0.405), the photoluminescence (PL) emission peaks exhibit characteristics...

Mobility model based on piezoresistance coefficients for Ge 3D transistor

July 2019
Kuan-Ting Chen | Ren-Yu He | Yun-Fang Chung | Min-Hsin Hsieh | Shu-Tong Chang

•To develop piezoresistance model for Ge 3D transistor.•Stress response for hole mobility of Ge 3D transistor is predicted.•Helps the future 3D Ge-based CMOS device design with strain engineering....

A critical look at modular adders using residue number system

July 2019
K. Vijaya Vardhan | K.M. Santhoshini | Sarada Musala | Avireni Srinivasulu

Presently, computer scientists and researchers show greater interest in one of the ancient techniques, namely, Residue Number System (RNS) to use in different fields. In this paper, an introduction...

Analysis and modeling of sequential circuits in QCA nano computing: RAM and SISO register study

July 2019
Md. Abdullah-Al-Shafi | Rahman Ziaur

Quantum-dot cellular automata (QCA) is a foremost archetype of field-coupled nanoscale devices. It is a non-von-Neumann, minimal energy dissipated model for conventional nano computing by transistor...

Performance enhancement of triple material double gate TFET with heterojunction and heterodielectric

July 2019
P. Vimala | T.S. Arun Samuel | D. Nirmal | Ajit Kumar Panda

In this paper, we proposed a 2 dimensional model of tripple material double gate Tunnel Field Effect Transistor (TM-DG TFET) with hetero-junction formed by germanium and silicon materials in the source-channel...

Effect of aluminum interfacial layer in a niobium oxide based resistive RAM

July 2019
Vishal Jain Manjunath | Andrew Rush | Abhijeet Barua | Rashmi Jha

Resistive RAM (Random Access Memory) has good scalability with high switching speed and low operating voltage making it one of the promising emerging nonvolatile memory technologies. Interfacial layer...

Performance analysis of GaN-based micro light-emitting diodes by laser lift-off process

July 2019
Sheng-Hui Li | Chia-Ping Lin | Yen-Hsiang Fang | Wei-Hung Kuo | Ming-Hsien Wu | Chu-Li Chao | Ray-Hua Horng | Guo-Dung J. Su

In this study, a monochromatic GaN-based micro-light-emitting-diode (µLED) array was fabricated using flip-chip technology. The laser lift-off (LLO) process was employed to decrease the light divergence...

Planar-Nothing On Insulator parasitic structure within a static induction transistor made by selective epitaxial growth

July 2019
Cristian Ravariu | Avireni Srinivasulu | Lidia Dobrescu

Power dissipation obstacle in electronic devices is strongly related to their internal breakdown mechanism. The Static Induction Transistor optimization imposes to reach p-gate regions as deep as vertical...

Current collapse scaling in GaN/AlGaN/SiC high electron mobility transistors

January 2019
D.S. Rawal | Amit | Sunil Sharma | Sonalee Kapoor | Robert Laishram | Seema Vinayak

This study reports the scaling of current collapse in GaN/AlGaN HEMTs with respect to the un-passivated gate drain distance on the gate edge. The source drain current reduction increased from 4 mA to...

Latch-up issue of drain metal connection split in test circuit with 3D TCAD simulation analysis in CMOS application

January 2019
Chun Chiang | Ping-Chen Chang | Tien-Hao Tang | Kuan-Cheng Su

In CMOS integrated circuit (IC), parasitic Silicon-Controlled Rectifier (SCR) path is unavoidable and causes the risk of latch up (LU) issue. In this work, we found that the SCR characteristic would...

A constant Q-factor notch filter using voltage difference transconductance amplifier

January 2019
K. Roja | K.M. Santhoshini | M. Sarada | Avireni Srinivasulu

This paper demonstrates a novel design of Notch filter circuit availing Voltage Difference Transconductance Amplifier (VDTA) active element. The proposed circuit utilizes two VDTA blocks, two capacitors...

An integrator circuit using voltage difference transconductance amplifier

January 2019
K. Malathi Santhoshini | Sarada Musala | Srinivasulu Avireni

This paper illustrates a novel design of voltage-mode Integrator using the active element, namely Voltage Difference Transconductance Amplifier (VDTA). The proposed circuit avails one VDTA element and...

Influence of electron quantum confinement on the strength of carbon nanotube bundles

January 2019
Lucian D. Filip | Valeriu Filip

Radial confinement and specific boundary conditions lead to inhomogeneous spatial distributions for conduction electrons in metallic carbon nanotubes.Such uneven spread of negative charge on the surface...

Design methodology of double nulling resistors nested-Miller compensation of multistage amplifier

January 2019
Wing-Shan Tam | Chi-Wah Kok

This paper presents a methodology to design large capacitive drive amplifier with high gain feed-forward transconductance stage using double nulling resistors nested-Miller compensation. The high gain-bandwidth...

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